Systems Architecture

Table of Contents

Basic concepts

maximum size of memory depends on the addressing scheme

memory access time — time elapsed between start of transfer of word of data and completion

memory cycle time — minimum time delay required between initiation of two successive memory operations

RAM (random-access memory) — memory where access time to any location is the same (compare to serial access)

Cache & virtual memory

memory access time is the bottleneck in the system. options to speed this up:

data is transferred between memories in blocks involving tens to thousands of words