Systems Architecture

Table of Contents

Internal organisation of memory chips

organised in form of array, one cell stores one bit of info

each row constitutes a memory word, all cells of a row are connected to a common line (‘word line’)

each column is connected to a Sense/Write circuit by two bit lines

an example of 16 x 8 organisation (16 words, 8 bits each):

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a second way of organising is, for example, a 1024 memory cell circuit organised in a 1K x 1 format (1000 words, 1 bit each):

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